Microelectronics Failure Analysis Desk Reference

The Electronic Device Failure Analysis Society proudly announces the Seventh Edition of the Microelectronics Failure Analysis Desk Reference, published by ASM International. The new edition will help engineers improve their ability to verify, isolate, uncover, and identify the root cause of failures. Prepared by a team of experts, this updated reference offers the latest information on advanced failure analysis tools and techniques, illustrated with numerous real-life examples.

Microelectronics Failure Analysis Desk Reference

The Electronic Device Failure Analysis Society (EDFAS) mission is to foster education and communication in the failure analysis community working for the technology advancement and the improved performance and reliability of devices and materials for the electronics industry.

The Electronic Device Failure Analysis Society proudly announces the Seventh Edition of the Microelectronics Failure Analysis Desk Reference, published by ASM International. The new edition will help engineers improve their ability to verify, isolate, uncover, and identify the root cause of failures. Prepared by a team of experts, this updated reference offers the latest information on advanced failure analysis tools and techniques, illustrated with numerous real-life examples.Topics include:

Failure analysis is the process of investigating semiconductor devices after failure is observed by electric measurement, and by physical, microscopy and chemical analysis techniques necessary to confirm the reported failure and clarify the failure mechanism. It relies on collecting failed components for subsequent examination of the cause or causes of failure using a wide array of methods. The NDT (nondestructive testing) methods are valuable because the failed products are unaffected by analysis, so inspection usually starts using these methods. "Microelectronics Failure Analysis Desk Reference" 5th edition published by ASM International is a good reference which covers the plethora of techniques employed in semiconductor failure analysis.

Of the multitude of scientific instrumentation used to characterize semiconductor device failures, SEM is one of the most common instruments. Because of the ubiquitous need for SEM images in failure analysis, a new breed of instruments, the compact or bench top SEM, is garnering attention. These smaller SEMs will not replace the full suite of analytical capabilities of the full-size instruments; however, their ease of use and quick, high resolution images allows operators with a wider range of SEM skill level. The compact SEM improves overall efficiency and analysis time; allowing researchers to quickly image the device when only an image is needed to guide further analysis thereby enabling the highly skilled operator of the full-sized SEM to focus on the more complicated analyses.

Failure analysis of BGA (ball grid array) devices can be daunting. The primary advantage of BGA packaging is the packing of large numbers, upwards of 500, of input-output pins into a relatively small area. The high number of connections is also what makes the failure analysis task so complex.

Deprocessing is the selective removal of specific types of material from an integrated circuit. In most cases, two types of etches are used: wet and dry (or plasma). The wet etches tend to be very inexpensive to implement, but sometimes selectivity problems occur. By comparison, dry etch equipment is initially expensive, but the technique can be very selective. For example, deprocessing ICs with silicon nitride and silicon oxynitride, common materials in silicon ICs, as passivation can be difficult without using a dry etch. Hot phosphoric acid effectively removes nitrides, but it etches aluminum. In most cases, it would be desirable to leave the aluminum in place after etching the passivation. With an oxygen/Freon 14 plasma, the nitride can be easily removed without affecting the aluminum. A complete failure analysis laboratory should have both types of etches available if possible.

In many cases, even though a defect is well understood electrically, positive proof in the form of an image of the anomaly is needed. Modern ICs have increased the interconnect levels to the point where viewing many types of defects is impossible without first removing the overlying layers. In some cases, the removal of one layer can act as an in-situ decoration of another layer. For example, etching the top layer of metal will decorate any holes or cracks in the oxide layer beneath and any vias that were not successfully opened during processing. Even though deprocessing is a destructive analysis technique, almost every failure analysis request will include some deprocessing, either to identify or to verify the mode of failure. As such, familiarity and proficiency at deprocessing is essential to any failure analysis lab.

Many different philosophies exist concerning the use of destructive techniques in failure analysis. Some groups do very little destructive analysis and prefer to characterize failures with "non-destructive" methods. Other groups will deprocess every sample down to the bare silicon even after the root cause of the failure has been documented. Their intention is to use these samples to further assess the quality of their product. Most laboratories will stop an analysis once the cause of the electrical failure has been identified. This is probably the most common situation as it minimizes the cost associated with failure analysis.

Students will study the reasons why structures and systems fail and how the root causes of these failures are diagnosed and mitigated. Students will be encouraged to combine concepts from engineering, natural sciences, social sciences, and ethics to address these complex issues. Students will be introduced to the basics of failure analysis and reliability engineering, and they will learn the scientific fundamentals underlying the most common types of failure (e.g. fatigue, corrosion). Students will be instructed in the approaches that are taken by experts to prevent failures before they occur and characterize them after they occur. This will include the tools, techniques, and information used by experts to diagnose and understand the root causes of failure of engineered products and structures, as well as the strategies employed by designers to create products and structures with higher reliability and longer life-spans. In addition, strategies and techniques to increase structural resilience and mitigate the consequences (e.g., cost, environmental impact, legal liability) that arise from failure will be discussed. Mitigation methods such as condition monitoring, self-reconstruction, and preparedness will be covered along with the effects of government policies and regulation. The course is taught through a combination of readings, lectures, guest speakers, videos, projects, and class discussion of case-study examples drawn from a wide range of products and systems ranging from automobiles and airplanes to bridges and wind turbines. 041b061a72